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[XPU][Mamba] Triton-based selective scan forward op for XPU#43421

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[XPU][Mamba] Triton-based selective scan forward op for XPU#43421
mfylcek wants to merge 4 commits into
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mfylcek:mfylcek/selective_scan_triton

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@mfylcek mfylcek commented May 22, 2026

Purpose

Adds a Triton implementation of the Mamba selective scan forward pass (selective_scan_fwd) to enable Mamba1 prefill on Intel XPU devices.

Test Result

tiiuae/falcon-mamba-7b

Tasks Version Filter n-shot Metric Value Stderr
gsm8k 3 flexible-extract 5 exact_match 0.5208 ± 0.0138
strict-match 5 exact_match 0.5133 ± 0.0138

mfylcek added 3 commits May 21, 2026 15:15
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
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@mergify mergify Bot added the intel-gpu Related to Intel GPU label May 22, 2026
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mergify Bot commented May 22, 2026

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @mfylcek.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

@mergify mergify Bot added the needs-rebase label May 22, 2026
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Code Review

This pull request introduces a Triton-based implementation of the selective scan forward pass for XPU platforms, enabling Mamba model support on Intel GPUs. The changes include the addition of a specialized Triton kernel and a wrapper method in the XPU operations class, along with logic to dispatch to these operations when running on XPU. Review feedback identifies a significant performance bottleneck in the kernel's memory access pattern, where parallelization over the dimension axis leads to uncoalesced memory loads and stores. Additionally, it is recommended to replace the manual sigmoid calculation with the built-in tl.sigmoid function to improve numerical stability and maintain consistency with the existing codebase.

Comment thread vllm/_xpu_ops.py
Comment on lines +383 to +384
batch_idx = tl.program_id(0)
dim_idx = tl.program_id(1)
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high

The current kernel parallelization strategy over the dim dimension, combined with the (batch, dim, seqlen) layout of the input tensors (as ensured by selective_scan_fn), leads to highly inefficient memory access patterns. Since seqlen is the contiguous dimension, adjacent work items (different dim_idx) in a subgroup/warp will access memory locations separated by seqlen bytes. This results in uncoalesced memory loads and stores, which is a significant performance bottleneck on GPU architectures. For better performance on XPU, consider refactoring the kernel to process blocks of the dim dimension or transposing the input tensors to a (batch, seqlen, dim) layout where dim is the contiguous dimension.

Comment thread vllm/_xpu_ops.py

if HAS_Z:
z_val = tl.load(z_base + pos).to(tl.float32)
out_z_val = out_val * z_val / (1.0 + tl.exp(-z_val))
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high

Using a manual implementation of the sigmoid function (1.0 / (1.0 + tl.exp(-z_val))) can be numerically unstable for large negative values of z_val and is less readable. It is better to use the built-in tl.sigmoid function, which is already used in other parts of the Mamba implementation in this repository (e.g., in mamba_ssm.py).

Suggested change
out_z_val = out_val * z_val / (1.0 + tl.exp(-z_val))
out_z_val = out_val * z_val * tl.sigmoid(z_val)

Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
@mergify mergify Bot removed the needs-rebase label May 22, 2026
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