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loongarch: Use intrinsics::simd for vbs{l,r}l #2180

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loongarch: Use intrinsics::simd for vbs{l,r}l #2180

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d9da4b8
loongarch: Rename SIMD helper intrinsics to avoid macro path issues
heiher Jul 1, 2026
13877cf
loongarch: Use `intrinsics::simd` for vldi
heiher Jun 30, 2026
0e7f17d
loongarch: Use `intrinsics::simd` for vbs{l,r}l
heiher Jul 1, 2026
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33 changes: 0 additions & 33 deletions crates/core_arch/src/loongarch64/lasx/generated.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -339,10 +339,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvfrstp_h(a: __v16i16, b: __v16i16, c: __v16i16) -> __v16i16;
#[link_name = "llvm.loongarch.lasx.xvshuf4i.d"]
fn __lasx_xvshuf4i_d(a: __v4i64, b: __v4i64, c: u32) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvbsrl.v"]
fn __lasx_xvbsrl_v(a: __v32i8, b: u32) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvbsll.v"]
fn __lasx_xvbsll_v(a: __v32i8, b: u32) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvextrins.b"]
fn __lasx_xvextrins_b(a: __v32i8, b: __v32i8, c: u32) -> __v32i8;
#[link_name = "llvm.loongarch.lasx.xvextrins.h"]
Expand Down Expand Up @@ -447,8 +443,6 @@ unsafe extern "unadjusted" {
fn __lasx_xvssrln_h_w(a: __v8i32, b: __v8i32) -> __v16i16;
#[link_name = "llvm.loongarch.lasx.xvssrln.w.d"]
fn __lasx_xvssrln_w_d(a: __v4i64, b: __v4i64) -> __v8i32;
#[link_name = "llvm.loongarch.lasx.xvldi"]
fn __lasx_xvldi(a: i32) -> __v4i64;
#[link_name = "llvm.loongarch.lasx.xvextl.qu.du"]
fn __lasx_xvextl_qu_du(a: __v4u64) -> __v4u64;
#[link_name = "llvm.loongarch.lasx.vext2xv.h.b"]
Expand Down Expand Up @@ -2187,24 +2181,6 @@ pub fn lasx_xvshuf4i_d<const IMM8: u32>(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvshuf4i_d(transmute(a), transmute(b), IMM8)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbsrl_v<const IMM5: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM5, 5);
unsafe { transmute(__lasx_xvbsrl_v(transmute(a), IMM5)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(1)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvbsll_v<const IMM5: u32>(a: m256i) -> m256i {
static_assert_uimm_bits!(IMM5, 5);
unsafe { transmute(__lasx_xvbsll_v(transmute(a), IMM5)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(2)]
Expand Down Expand Up @@ -2597,15 +2573,6 @@ pub fn lasx_xvssrln_w_d(a: m256i, b: m256i) -> m256i {
unsafe { transmute(__lasx_xvssrln_w_d(transmute(a), transmute(b))) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[rustc_legacy_const_generics(0)]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
pub fn lasx_xvldi<const IMM_S13: i32>() -> m256i {
static_assert_simm_bits!(IMM_S13, 13);
unsafe { transmute(__lasx_xvldi(IMM_S13)) }
}

#[inline]
#[target_feature(enable = "lasx")]
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
Expand Down
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