ch32: Add usbd peripheral

examples/wch/ch32v/build.zig

@@ -40,6 +40,7 @@ pub fn build(b: *std.Build) void {
         .{ .target = mb.ports.ch32v.boards.ch32v203.nano_ch32v203, .name = "nano_ch32v203_usb_cdc", .file = "src/usb_cdc.zig" },
         .{ .target = mb.ports.ch32v.boards.ch32v203.suzuduino_uno_v1b, .name = "suzuduino_blinky", .file = "src/board_blinky.zig" },
         .{ .target = mb.ports.ch32v.boards.ch32v203.suzuduino_uno_v1b, .name = "suzuduino_usb_cdc", .file = "src/usb_cdc.zig" },
+        .{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_usb_cdc", .file = "src/usb_cdc.zig" },
         .{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_dma", .file = "src/dma.zig" },
         .{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_ws2812", .file = "src/ws2812.zig" },
         .{ .target = mb.ports.ch32v.boards.ch32v203.lana_tny, .name = "lana_tny_uart_log", .file = "src/uart_log.zig" },

port/wch/ch32v/src/boards/LANA_TNY.zig

@@ -5,6 +5,11 @@ pub const microzig = @import("microzig");
 pub const chip = @import("chip");
 const ch32v = microzig.hal;
 
+pub const product_string = "LANA TNY";
+
+/// CH32V203G6U6 has USBD (PMA-based), not USBFS/OTG
+pub const usb_driver: ch32v.UsbDriver = .usbd;
+
 /// Clock configuration for this board
 pub const clock_config: ch32v.clocks.Config = .{
     .source = .hsi,
@@ -18,6 +23,7 @@ pub const cpu_frequency = clock_config.target_frequency;
 pub fn init() void {
     ch32v.clocks.init(clock_config);
     ch32v.time.init();
+    ch32v.clocks.enable_usbd_clock();
 }
 
 pub const pin_config = ch32v.pins.GlobalConfiguration{

port/wch/ch32v/src/hals/ch32v20x.zig

@@ -9,7 +9,15 @@ pub const i2c = @import("i2c.zig");
 pub const usart = @import("usart.zig");
 pub const spi = @import("spi.zig");
 pub const dma = @import("dma.zig");
-pub const usb = @import("usbfs.zig");
+pub const UsbDriver = enum { usbd, usbfs };
+
+pub const usb = if (microzig.config.has_board and @hasDecl(microzig.board, "usb_driver"))
+    switch (microzig.board.usb_driver) {
+        .usbd => @import("usbd.zig"),
+        .usbfs => @import("usbfs.zig"),
+    }
+else
+    @import("usbfs.zig");
 
 /// HSI (High Speed Internal) oscillator frequency
 /// This is the fixed internal RC oscillator frequency for CH32V20x

port/wch/ch32v/src/hals/clocks.zig

@@ -55,6 +55,7 @@ const peripheral = enum {
     TIM2,
     TIM3,
     TIM4,
+    USBD,
 };
 
 pub fn enable_peripheral_clock(p: peripheral) void {
@@ -81,6 +82,7 @@ pub fn enable_peripheral_clock(p: peripheral) void {
         .TIM2 => RCC.APB1PCENR.modify(.{ .TIM2EN = 1 }),
         .TIM3 => RCC.APB1PCENR.modify(.{ .TIM3EN = 1 }),
         .TIM4 => RCC.APB1PCENR.modify(.{ .TIM4EN = 1 }),
+        .USBD => RCC.APB1PCENR.modify(.{ .USBDEN = 1 }),
     }
 }
 
@@ -432,6 +434,22 @@ pub fn enable_usbfs_clock() void {
     // Enable the AHB clock gate for the USBFS peripheral block.
     enable_peripheral_clock(.USBOTG);
 }
+// ============================================================================
+// Enable + configure USBD clocks (PMA-based USB device, APB1).
+// ============================================================================
+pub fn enable_usbd_clock() void {
+    const sys_clock = get_sysclk();
+    switch (sys_clock) {
+        48_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 0 }),
+        96_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 1 }),
+        144_000_000 => RCC.CFGR0.modify(.{ .USBPRE = 2 }),
+        else => @panic("Unsupported sysclock for USBD"),
+    }
+
+    // Enable the APB1 clock gate for the USBD peripheral.
+    enable_peripheral_clock(.USBD);
+}
+
 // ============================================================================
 // Enable + configure USBHS clocks.
 // ============================================================================