TOGSim C++ trace-generation pipeline (P0-P3): explicit dataflow producer + barriers#267

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feature/togsim-cpp-trace

Commits on Jun 19, 2026

[Docs] C++ trace pipeline design (runtime-tag pairing, ABI v11)

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[Frontend] Extract shared MLIR pass helpers into _mlir_util

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[Frontend] C++ trace front end: skeleton + EmitC + cost/dep analysis

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[TOGSim] C++ trace runtime, loader, bridge, and Core feed (ABI v11)

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[Frontend] Tests for the C++ trace pipeline (skeleton / EmitC / runtime)

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[TOGSim] Rename trace producer entry togsim_emit -> togsim_kernel

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[TOGSim] Note the multi-tile-K/conv tag-pairing plan (per-iteration tag alloc)

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[TOGSim] Fix multi-tile-K/conv tag collision in the bridge (per-record tag key)

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[Frontend] Per-iteration tag alloc in dma-fine-grained (multi-tile-K/conv)

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[Frontend] Strip the reduction accum marker from trace memory_barrier slot

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[Docs] Note the subtile-only tag_slot and the multi-tile-K fix

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Commits on Jun 22, 2026