Skip to content

Commit e685da3

Browse files
authored
Merge pull request #26 from saroamirkhanyan/patch-1
Changed reqister to register
2 parents 1e6e522 + f2730ee commit e685da3

1 file changed

Lines changed: 1 addition & 1 deletion

File tree

README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ The Clang assembler does not understand `MOV X1, X2, LSL #1`, instead `LSL X1, X
9999

100100
### Register and Extension
101101

102-
Clang requires the source register to be 32-Bit. This makes sense, because with these extensions, the upper 32 Bit of a 64-Bit reqister will never be touched:
102+
Clang requires the source register to be 32-Bit. This makes sense, because with these extensions, the upper 32 Bit of a 64-Bit register will never be touched:
103103
```
104104
ADD X2, X1, W0, SXTB
105105
```

0 commit comments

Comments
 (0)